Simonenko Valeriy.P.

Computer aided design tool development and their use for the high-speed vision processor design

The vision system for the high dynamic range (HDR) video signals is developed. The system performs the HDR image compression to the signal with dynamic range of 48 dB without loss of sharpness in the light and dark areas and no artifacts, and has moderate hardware costs when it is implemented in FPGA. The Retinex compression algorithm based on the bilateral function is considered. A simplified HDR compression algorithm is proposed, that uses the intelligent image analysis of local characteristics instead of the bilateral function .

Development of theoretical basics, methods and tools for design of modern high speed computer systems in Grid and Cloud systems

A new architectural concept of parallel computing in GRID systems and cloud environment is proposed, which uses FPGA as a high-performance heterogeneous computing resource. FPGA is used as heterogeneous programmable operating unit for processing data streams, allowing for achievement of optimized performance-related energy consumption. The concept simplifies programming the computational problems for these systems.

Architectural conception and network processor development which provide intelectual data processing.

A set of methods for pipelined computer system synthesis is developed. The methods are based on mapping the spaced synchronous dataflow graphs (SSDFG) into the system structure and its schedule. The input data of the methods are initial SSDFG, given period of the algorithm implementation, and optimization criterium. The developed methods provide minimising the clock period as well as processor unit, register, multiplexor number, interprocessor communications, memory volume, energy consumption minimizations.