Computer aided design tool development and their use for the high-speed vision processor design

The vision system for the high dynamic range (HDR) video signals is developed. The system performs the HDR image compression to the signal with dynamic range of 48 dB without loss of sharpness in the light and dark areas and no artifacts, and has moderate hardware costs when it is implemented in FPGA. The Retinex compression algorithm based on the bilateral function is considered. A simplified HDR compression algorithm is proposed, that uses the intelligent image analysis of local characteristics instead of the bilateral function .

The intellectual property core (IP core) library for the different vision systems is developed. The IP cores have the minimized hardware costs, high bandwidth and unified interface. They are designed to support the pixel frequency up to 150 MHz when implemented in the Lattice FPGAs, and twice more when implemented in Altera, Xilinx FPGAs.

An analytical method for the pipelined IP core design is proposed, which is based on the spatial synchronous data flows (SDF). It provides a synthesis of pipelined computing devices with a given throughput and minimized hardware costs. The simplified design of IP cores for the video processing is shown. The optimization complexity using this method is much less due to a set of restrictions imposed on SDF.

The microprocessor RISC-ST2 IP core is developed, which is focused on the sequential data stream processing. It takes a little hardware costs and gives up to 100 mln. instructions per second. An assembly program is developed as well. The microprocessor IP core is used to control the vision system and intelligent processing of images. It is able to extract the images from the GIF-files at the speed of 5 megapixels per second.

The vision system tests have shown that it performs the HDR compression from 120 dB to 48 dB with a minimum loss of clarity of details both in dark and in light areas. It was found that detail visibility is improved especially in bright areas of the image due to the use of the modernized Retinex algorithm.

Computer aided design tool development  and their use for the high-speed vision processor design
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